Node / ReticulumProjects / RNode_Firmware.git / files / sx128x.h

Displaying Raw • Download

T8b949e// Copyright Sandeep Mistry, Mark Qvist and Jacob Eva.

T8b949e// Licensed under the MIT license.

Tff7b72#Tff7b72ifndef SX128X_H

Tff7b72#Tff7b72define SX128X_H

Tff7b72#Tff7b72include T8b949e<Arduino.h>

Tff7b72#Tff7b72include T8b949e<SPI.h>

Tff7b72#Tff7b72include T8b949e"Modem.h"

Tff7b72#Tff7b72define LORA_DEFAULT_SS_PIN 10

Tff7b72#Tff7b72define LORA_DEFAULT_RESET_PIN 9

Tff7b72#Tff7b72define LORA_DEFAULT_DIO0_PIN 2

Tff7b72#Tff7b72define LORA_DEFAULT_RXEN_PIN -1

Tff7b72#Tff7b72define LORA_DEFAULT_TXEN_PIN -1

Tff7b72#Tff7b72define LORA_DEFAULT_BUSY_PIN -1

Tff7b72#Tff7b72define LORA_MODEM_TIMEOUT_MS 15E3

Tff7b72#Tff7b72define PA_OUTPUT_RFO_PIN 0

Tff7b72#Tff7b72define PA_OUTPUT_PA_BOOST_PIN 1

Tff7b72#Tff7b72define RSSI_OFFSET 157

Te6edf3class Te6edf3sx128x Tff7b72: Te6edf3public Te6edf3Stream Tb4b4b4{

Te6edf3publicTff7b72:

Te6edf3sx128xTb4b4b4(Tb4b4b4)Tb4b4b4;

Tffa657int Td2a8ffbeginTb4b4b4(Tffa657unsigned Tffa657long Te6edf3frequencyTb4b4b4)Tb4b4b4;

Tffa657void Td2a8ffendTb4b4b4(Tb4b4b4)Tb4b4b4;

Tffa657void Td2a8ffresetTb4b4b4(Tb4b4b4)Tb4b4b4;

Tffa657int Td2a8ffbeginPacketTb4b4b4(Tffa657int Te6edf3implicitHeader Tff7b72= Tffa657falseTb4b4b4)Tb4b4b4;

Tffa657int Td2a8ffendPacketTb4b4b4(Tb4b4b4)Tb4b4b4;

Tffa657int Td2a8ffparsePacketTb4b4b4(Tffa657int Te6edf3size Tff7b72= T79c0ff0Tb4b4b4)Tb4b4b4;

Tffa657int Td2a8ffpacketRssiTb4b4b4(Tb4b4b4)Tb4b4b4;

Tffa657int Td2a8ffpacketRssiTb4b4b4(Tffa657uint8_t Te6edf3pkt_snr_rawTb4b4b4)Tb4b4b4;

Tffa657int Td2a8ffcurrentRssiTb4b4b4(Tb4b4b4)Tb4b4b4;

Tffa657uint8_t Td2a8ffpacketRssiRawTb4b4b4(Tb4b4b4)Tb4b4b4;

Tffa657uint8_t Td2a8ffcurrentRssiRawTb4b4b4(Tb4b4b4)Tb4b4b4;

Tffa657uint8_t Td2a8ffpacketSnrRawTb4b4b4(Tb4b4b4)Tb4b4b4;

Tffa657float Td2a8ffpacketSnrTb4b4b4(Tb4b4b4)Tb4b4b4;

Tffa657long Td2a8ffpacketFrequencyErrorTb4b4b4(Tb4b4b4)Tb4b4b4;

T8b949e// from Print

Te6edf3virtual Tffa657size_t Te6edf3writeTb4b4b4(Tffa657uint8_t Te6edf3byteTb4b4b4)Tb4b4b4;

Te6edf3virtual Tffa657size_t Te6edf3writeTb4b4b4(Tff7b72const Tffa657uint8_t Tff7b72*Te6edf3bufferTb4b4b4, Tffa657size_t Te6edf3sizeTb4b4b4)Tb4b4b4;

T8b949e// from Stream

Te6edf3virtual Tffa657int Te6edf3availableTb4b4b4(Tb4b4b4)Tb4b4b4;

Te6edf3virtual Tffa657int Te6edf3readTb4b4b4(Tb4b4b4)Tb4b4b4;

Te6edf3virtual Tffa657int Te6edf3peekTb4b4b4(Tb4b4b4)Tb4b4b4;

Te6edf3virtual Tffa657void Te6edf3flushTb4b4b4(Tb4b4b4)Tb4b4b4;

Tffa657void Td2a8ffonReceiveTb4b4b4(Tffa657voidTb4b4b4(Tff7b72*Te6edf3callbackTb4b4b4)Tb4b4b4(Tffa657intTb4b4b4)Tb4b4b4)Tb4b4b4;

Tffa657void Td2a8ffreceiveTb4b4b4(Tffa657int Te6edf3size Tff7b72= T79c0ff0Tb4b4b4)Tb4b4b4;

Tffa657void Td2a8ffstandbyTb4b4b4(Tb4b4b4)Tb4b4b4;

Tffa657void Td2a8ffsleepTb4b4b4(Tb4b4b4)Tb4b4b4;

Tffa657bool Td2a8ffpreInitTb4b4b4(Tb4b4b4)Tb4b4b4;

Tffa657uint8_t Td2a8ffgetTxPowerTb4b4b4(Tb4b4b4)Tb4b4b4;

Tffa657void Td2a8ffsetTxPowerTb4b4b4(Tffa657int Te6edf3levelTb4b4b4, Tffa657int Te6edf3outputPin Tff7b72= Te6edf3PA_OUTPUT_PA_BOOST_PINTb4b4b4)Tb4b4b4;

Tffa657uint32_t Td2a8ffgetFrequencyTb4b4b4(Tb4b4b4)Tb4b4b4;

Tffa657void Td2a8ffsetFrequencyTb4b4b4(Tffa657uint32_t Te6edf3frequencyTb4b4b4)Tb4b4b4;

Tffa657void Td2a8ffsetSpreadingFactorTb4b4b4(Tffa657int Te6edf3sfTb4b4b4)Tb4b4b4;

Tffa657uint8_t Td2a8ffgetSpreadingFactorTb4b4b4(Tb4b4b4)Tb4b4b4;

Tffa657uint32_t Td2a8ffgetSignalBandwidthTb4b4b4(Tb4b4b4)Tb4b4b4;

Tffa657void Td2a8ffsetSignalBandwidthTb4b4b4(Tffa657uint32_t Te6edf3sbwTb4b4b4)Tb4b4b4;

Tffa657void Td2a8ffsetCodingRate4Tb4b4b4(Tffa657int Te6edf3denominatorTb4b4b4)Tb4b4b4;

Tffa657uint8_t Td2a8ffgetCodingRate4Tb4b4b4(Tb4b4b4)Tb4b4b4;

Tffa657void Td2a8ffsetPreambleLengthTb4b4b4(Tffa657long Te6edf3preamble_symbolsTb4b4b4)Tb4b4b4;

Tffa657void Td2a8ffsetSyncWordTb4b4b4(Tffa657int Te6edf3swTb4b4b4)Tb4b4b4;

Tffa657bool Td2a8ffdcdTb4b4b4(Tb4b4b4)Tb4b4b4;

Tffa657void Td2a8ffclearIRQStatusTb4b4b4(Tb4b4b4)Tb4b4b4;

Tffa657void Td2a8ffenableCrcTb4b4b4(Tb4b4b4)Tb4b4b4;

Tffa657void Td2a8ffdisableCrcTb4b4b4(Tb4b4b4)Tb4b4b4;

Tffa657void Td2a8ffenableTCXOTb4b4b4(Tb4b4b4)Tb4b4b4;

Tffa657void Td2a8ffdisableTCXOTb4b4b4(Tb4b4b4)Tb4b4b4;

Tffa657void Td2a8fftxAntEnableTb4b4b4(Tb4b4b4)Tb4b4b4;

Tffa657void Td2a8ffrxAntEnableTb4b4b4(Tb4b4b4)Tb4b4b4;

Tffa657void Td2a8ffloraModeTb4b4b4(Tb4b4b4)Tb4b4b4;

Tffa657void Td2a8ffwaitOnBusyTb4b4b4(Tb4b4b4)Tb4b4b4;

Tffa657void Td2a8ffexecuteOpcodeTb4b4b4(Tffa657uint8_t Te6edf3opcodeTb4b4b4, Tffa657uint8_t Tff7b72*Te6edf3bufferTb4b4b4, Tffa657uint8_t Te6edf3sizeTb4b4b4)Tb4b4b4;

Tffa657void Td2a8ffexecuteOpcodeReadTb4b4b4(Tffa657uint8_t Te6edf3opcodeTb4b4b4, Tffa657uint8_t Tff7b72*Te6edf3bufferTb4b4b4, Tffa657uint8_t Te6edf3sizeTb4b4b4)Tb4b4b4;

Tffa657void Td2a8ffwriteBufferTb4b4b4(Tff7b72const Tffa657uint8_tTff7b72* Te6edf3bufferTb4b4b4, Tffa657size_t Te6edf3sizeTb4b4b4)Tb4b4b4;

Tffa657void Td2a8ffreadBufferTb4b4b4(Tffa657uint8_tTff7b72* Te6edf3bufferTb4b4b4, Tffa657size_t Te6edf3sizeTb4b4b4)Tb4b4b4;

Tffa657void Td2a8ffsetPacketParamsTb4b4b4(Tffa657uint32_t Te6edf3target_preamble_symbolsTb4b4b4, Tffa657uint8_t Te6edf3headermodeTb4b4b4, Tffa657uint8_t Te6edf3payload_lengthTb4b4b4, Tffa657uint8_t Te6edf3crcTb4b4b4)Tb4b4b4;

Tffa657void Td2a8ffsetModulationParamsTb4b4b4(Tffa657uint8_t Te6edf3sfTb4b4b4, Tffa657uint8_t Te6edf3bwTb4b4b4, Tffa657uint8_t Te6edf3crTb4b4b4)Tb4b4b4;

Tffa657void Td2a8ffcrcTb4b4b4(Tb4b4b4) Tb4b4b4{ Te6edf3enableCrcTb4b4b4(Tb4b4b4)Tb4b4b4; Tb4b4b4}

Tffa657void Td2a8ffnoCrcTb4b4b4(Tb4b4b4) Tb4b4b4{ Te6edf3disableCrcTb4b4b4(Tb4b4b4)Tb4b4b4; Tb4b4b4}

Tffa657void Td2a8ffsetPinsTb4b4b4(Tffa657int Te6edf3ss Tff7b72= Te6edf3LORA_DEFAULT_SS_PINTb4b4b4, Tffa657int Te6edf3reset Tff7b72= Te6edf3LORA_DEFAULT_RESET_PINTb4b4b4, Tffa657int Te6edf3dio0 Tff7b72= Te6edf3LORA_DEFAULT_DIO0_PINTb4b4b4, Tffa657int Te6edf3busy Tff7b72= Te6edf3LORA_DEFAULT_BUSY_PINTb4b4b4, Tffa657int Te6edf3rxen Tff7b72= Te6edf3LORA_DEFAULT_RXEN_PINTb4b4b4, Tffa657int Te6edf3txen Tff7b72= Te6edf3LORA_DEFAULT_TXEN_PINTb4b4b4)Tb4b4b4;

Tffa657void Td2a8ffsetSPIFrequencyTb4b4b4(Tffa657uint32_t Te6edf3frequencyTb4b4b4)Tb4b4b4;

Tffa657void Td2a8ffdumpRegistersTb4b4b4(Te6edf3StreamTff7b72& Te6edf3outTb4b4b4)Tb4b4b4;

Te6edf3privateTff7b72:

Tffa657void Te6edf3explicitHeaderModeTb4b4b4(Tb4b4b4)Tb4b4b4;

Tffa657void Td2a8ffimplicitHeaderModeTb4b4b4(Tb4b4b4)Tb4b4b4;

Tffa657bool Td2a8ffgetPacketValidityTb4b4b4(Tb4b4b4)Tb4b4b4;

Tffa657void Td2a8ffhandleDio0RiseTb4b4b4(Tb4b4b4)Tb4b4b4;

Tffa657uint8_t Td2a8ffreadRegisterTb4b4b4(Tffa657uint16_t Te6edf3addressTb4b4b4)Tb4b4b4;

Tffa657void Td2a8ffwriteRegisterTb4b4b4(Tffa657uint16_t Te6edf3addressTb4b4b4, Tffa657uint8_t Te6edf3valueTb4b4b4)Tb4b4b4;

Tffa657uint8_t Td2a8ffsingleTransferTb4b4b4(Tffa657uint8_t Te6edf3opcodeTb4b4b4, Tffa657uint16_t Te6edf3addressTb4b4b4, Tffa657uint8_t Te6edf3valueTb4b4b4)Tb4b4b4;

Tff7b72static Tffa657void Td2a8ffonDio0RiseTb4b4b4(Tb4b4b4)Tb4b4b4;

Tffa657void Td2a8ffhandleLowDataRateTb4b4b4(Tb4b4b4)Tb4b4b4;

Tffa657void Td2a8ffoptimizeModemSensitivityTb4b4b4(Tb4b4b4)Tb4b4b4;

Te6edf3privateTff7b72:

Te6edf3SPISettings Te6edf3_spiSettingsTb4b4b4;

Tffa657int Te6edf3_ssTb4b4b4;

Tffa657int Te6edf3_resetTb4b4b4;

Tffa657int Te6edf3_dio0Tb4b4b4;

Tffa657int Te6edf3_rxenTb4b4b4;

Tffa657int Te6edf3_txenTb4b4b4;

Tffa657int Te6edf3_busyTb4b4b4;

Tffa657int Te6edf3_modemTb4b4b4;

Tffa657unsigned Tffa657long Te6edf3_frequencyTb4b4b4;

Tffa657int Te6edf3_txpTb4b4b4;

Tffa657uint8_t Te6edf3_sfTb4b4b4;

Tffa657uint8_t Te6edf3_bwTb4b4b4;

Tffa657uint8_t Te6edf3_crTb4b4b4;

Tffa657int Te6edf3_packetIndexTb4b4b4;

Tffa657uint32_t Te6edf3_preambleLengthTb4b4b4;

Tffa657int Te6edf3_implicitHeaderModeTb4b4b4;

Tffa657int Te6edf3_payloadLengthTb4b4b4;

Tffa657int Te6edf3_crcModeTb4b4b4;

Tffa657int Te6edf3_fifo_tx_addr_ptrTb4b4b4;

Tffa657int Te6edf3_fifo_rx_addr_ptrTb4b4b4;

Tffa657uint8_t Te6edf3_packetTb4b4b4[T79c0ff256Tb4b4b4]Tb4b4b4;

Tffa657bool Te6edf3_preinit_doneTb4b4b4;

Tffa657bool Te6edf3_tcxoTb4b4b4;

Tffa657bool Te6edf3_radio_onlineTb4b4b4;

Tffa657int Te6edf3_rxPacketLengthTb4b4b4;

Tffa657uint32_t Te6edf3_bitrateTb4b4b4;

Tffa657void Tb4b4b4(Tff7b72*Te6edf3_receive_callbackTb4b4b4)Tb4b4b4(Tffa657intTb4b4b4)Tb4b4b4;

Tb4b4b4}Tb4b4b4;

Tff7b72extern Te6edf3sx128x Te6edf3sx128x_modemTb4b4b4;

Tff7b72#Tff7b72endif